• 专利附录
  • 专利说明
  • 权利要求
  • 类似技术
  • 同族专利
  • 引用文献
  • 法律状态
  • 优先权
    • 专利摘要:
    In the process described, a sample of a layered semi-conductor (4) is placed in contact with an electrolyte (2) then subjected to anodic etching during which the depth of etching is determined by integration of the current. During etching, the sample (4) is also excited by an electric signal and the real component of the admittance and hence the conductance of the probe at the frequency of excitation is determined, the extreme values of this component are analysed, and the values of the depth of etching corresponding to these extremes, which characterize the junctions between the layers of the sample (4) tested, are determined. The installation for implementing the procedure contains a cell (1) filled with electrolyte (2) in which is immersed a graphite electrode (5), a saturated calomel electrode (6), and a platinum electrode (7) surrounding the surface of the sample (4) subjected to etching, electrodes (8, 9) neither of which touch the surface of the sample (4) subjected to etching, a potentiostat (13) which is connected to the calomel electrode (6) and the direct current source (12), the current integrator (14), which receives the etching current intensity signal, a generator (15) which emits a periodic signal between the sample (14) and the metal electrode, and the measurement element (16) for measuring the conductance of the sample (4).
    公开号:SU1713448A3
    申请号:SU894613326
    申请日:1989-01-04
    公开日:1992-02-15
    发明作者:Ференци Дьердь；Эрдельи Каталин；Шомодьи Мария；Бода Янош；Фюле Дьердь；Асоди Габор
    申请人:Семилаб Фельвезето Физикаи Лабораториум Ресзвенитарсасаг (Инопредприятие)；
    IPC主号:
    专利说明:

    transitions of the studied layers of sample 6. The device for carrying out the method contains an electrolyzer 1. filled with electrolyte 2, a graphite electrode 3 immersed in this electrolyte 2, a saturated calomel electrode 4 and covering the etched surface of sample 6 a metal (platinum) electrode 5, electrodes 7 and 8, which touch the surface of sample b, not etched, potentiostat 10,
    which is connected to the calomel electrode 4 and the DC power supply source 9, the current integrator 11 receiving the etching current signal, the generator 12 connecting a periodic signal between sample b and the metal electrode 5, and the meter 13 of the actual component of the total (active) conductivity of sample b . 2 sec. and 9 hp ff, 2 ill.
    The invention relates to a measurement technique and can be used to determine the thickness of a layer in semiconductor laminated structures, in particular in heterojunctions.
    The purpose of the invention is to increase accuracy and productivity by more accurately determining the boundaries of the layers of laminated structures and reducing the time spent on measurement.
    FIG. 1 shows a diagram of an apparatus for determining the thickness of layers in semiconductor laminated structures: FIG. 2 is a diagram of the dependence of the etching depth on the actual component of the total conductivity (active conductivity).,
    A device for determining the thickness of layers in semiconductor layered structures contains an electrolyzer 1 filled with electrolyte 2, a graphite electrode 3 placed in the electrolyzer 1, a saturated calomel electrode 4 and a metal electrode 5 designed to accommodate a group of electrodes 7 at the sample surface b and 8, containing at least two electrodes and intended for contact with the opposite side of sample b, a source of DC power 9, a potentiostat 10, in the stroke of which is connected to a graphite electrode 3, the control input is with a saturated calomel electrode 4, and the power input with an output of a DC power source 9, a current integrator 11 connected to an electrode group 7 and 8, a generator 12 connected to a metal electrode 5 and through the integrator 11 current to the group of electrodes 7 and 8, and the meter response of the sample, made in the form of the meter 13 of the actual component of admittance and connected to the output of the generator.
    The meter 13 of the actual total conduction component is advantageously implemented in the form of a series connected (blocking amplifier and
    phase sensitive detector.
    The device may also contain a signal processing unit 14, to the first input of which the output of the meter 13 of the actual component of full conductivity is connected, and the output of the integrator 11 of the current is connected to the second input.
    The signal processing unit 14 is in the form of a two-coordinate recorder.
    For the measurement, it is necessary for the MO to make ohmic contact with the side of the image, which is opposite to the layered structure. This contact is usually made with tungsten electrodes 7 and 8, made in the form of a spike with a radius of 25 microns.
    For the corresponding contact and its controllability, several elec trodes 7 and 8 (at least two) should be used, elastically pressed against the sample b with 5 using the power of 15. In addition, it is advisable to cover the electrodes 7 and 8 with contact metal corresponding to the material of the sample b. In order to further improve the contact using the ignition unit 16, before starting measurements between the semiconductor and the electrodes 7 and 8, an appropriately charged capacitor is discharged, which results in an alloy with a small amount of metal.
    The device also uses a pump 17, which continuously maintains the circulation of electrolyte 2 to provide a uniform etched surface.
    0 or mixes it by blowing in N2 gas. so that the etch products are removed from the surface of the semiconductor structure.
    On the electrolyzer 1 against the receiving opening 18 for the sample 6 there is a window 19, the turn which the sample 6 can be illuminated with the help of the source 20 of light.
    The essence of the method is as follows.
    The maximum of the active conductivity signal as a function of the frequency of the measuring high-frequency signal is observed when
    (, 0)
    where ("is the frequency of the measuring signal;
    d is the time constant of the thermal emission of a deep level.
    If the high-frequency active conductivity is measured at a fixed frequency (for example, in the range of 3-10 kHz), then the conditions for which equation (1) is valid, i.e. when, when the etching front is projected, an empty zone reaches a facet on the surface of two layers and a signal of active conductivity is Extreme.
    Due to the fact that the depletion zone is also created by the established field, it is not necessary to provide a special pre-stressing direction of the lock.
    When implementing the proposed method is carried out:
     a) electrolytic (anodic) etching of the tested multi-layer Semiconductor structure, such as a disk, using DC electrolysis as a function of, while measuring the thickness of the removed layer;
    b) parallel to the anodic etching measure the real part of the total conductivity of the boundary surface of the semiconductor-electrolyte as a function of the etching depth, which can be determined on the basis of time, current and thickness (the position of the boundary surface between the layers of different material and / and / t various doping at extreme values of the activity signal).
    If an n-type sample is measured, then its contact surface with electrolysis is excited by light.
    The time spent is substantially reduced because the etching is carried out continuously throughout the entire measurement.
    During the measurements, the excitation is carried out using a sinusoidal signal with a frequency in the range of 500 10 kHz.
    Etching is carried out with a current intensity of 1 µA.
    The excitation signal must be connected between a metal, preferably a platinum, electrode 5. immersed in electrolyte 2 and covering the etching surface of sample 6, and at least two edges of electrodes 7 and B, pressed against some other surface of the sample6.
    Contact with samples 6 can be improved if, before starting the measurements, to carry out the discharge between the tips of the electrodes 7 and 8 and the sample 6, the material of the tip of the electrode 7 (8) melted slightly into the sample 6.
    The device works as follows.,.
    During the measurement, anodic etching of the surface of sample 6, which is in contact with electrolyte 2, is carried out using an applied constant voltage between graphite electrode 3 and electrodes 7 and 8. The constant voltage (etching voltage) required for anodic etching is selected from using the characteristics of the I - V sample 6 with a semiconductor layered structure. To establish the voltage, potentiostat 10 is used, the voltage provided by calomel electrode 4 is chosen as a reference value relative to this. The potential that occurs spontaneously between the solution, electrolyte 2, and the semiconductor surface of sample 6 is the equilibrium potential of the solution, its value indicate relative to the calomel electrode 4.
    To make measurements it is necessary to withstand certain conditions:
    a) a semiconductor with respect to a graphite electrode 3, regardless of the type of conductivity, must have a positive voltage in order for anodic etching to take place;
    b) when using n-type semiconductor materials so that the etching process can flow, it must be illuminated with a light of greater or equal magnitude T1 as the forbidden zone of the semiconductor, to ensure the formation of etching necessary for etching of the minority carriers (holes); -c) electrolyte 2 must hold the anodic oxidized product in solution;
    d) during etching, the surface of the semiconductor sample should have the least unevenness of the surface.
    Uniformity (small roughness) of the surface is achieved:
    a) when using p-type materials with an appropriate etching voltage.
    The etching current is 1-100 µA, (Due to the fact that the semiconductor sample 6 due to the etching voltage is previously under voltage in the direction of transmission, to enable measurement of the active conductivity using a DC power supply 9 between the metal (platinum) electrode 5 and electrodes 7 and 8 create a preliminary voltage in the direction of locking. Its usual value is about 0.2-0.6 V relative to calomel electrode 4.}:
    .6) when materials are used by setting the etching current in the range of 1-100 µA by selecting the light intensity of the illumination source 20 and the magnitude of the etching voltage.
    When using both types of materials, it is necessary to ensure the mixing of the electrolyte to ensure removal of etching products using the pump 17.
    To measure high-frequency admittance (impedance) using a generator 11 between a metal (platinum) electrode 5 and electrodes 7 and 8 that have ohmic contact with a semiconductor sample 6, a signal with a small non-linear distortion, the repetition frequency of which can vary from 500 Hz, is used to UkHz, the effective voltage value is 5-50 mV. The reaction of the semiconductor design of sample 6 (the current signal displaced relative to the phase voltage) is supplied to the meter 13 of the actual total conductivity component, containing the blocking amplifier and phase sensitive detector and producing the total conductivity (active conductivity) of the total conductivity (if necessary, both components of inpedance).
    The anodic etching current is processed by the current integrator 11 and at its output, taking into account the geometric dimensions of the investigated sample 6 and its density, the values of the layer thicknesses. The signal processing unit 14, as a component Y, receives the admittance output signal of the meter 13, and as a component X, a layer thickness signal processed by the current integrator 11, and plots the X-Y diagram. If a computer is used as a signal processing unit, input data is fed through an analog-to-digital converter. As the final result of the measurement, a change in the magnitude of the actual total conductivity component (active conductivity) is obtained depending on the etching depth (thickness of the removed layer or faults): extreme values are the thickness of the individual layers.
    Example. Sample 6 with the semiconductor structure under study consists of a 10-layer structure on a pAce CaAs substrate made of alternating five layers of Cao, pA-type eAlo.4As and p-type CaAs. The upper layer is a CaAs layer with a thickness of 0.5 µm, the thickness of the remaining layers is 0.1 µm. A solution of 1N KOH is used as electrolyte 2. Sample 6 is irradiated with a light source 20, and a halogen lamp with an appropriate focusing system and infra-filter is used. Measurements are carried out at 25 ° C (room temperature).
    The measured equilibrium potential with respect to the saturated calomel electrode measured without, is 4 (b-0; 8) c.
    The etching voltage of 0.2 V. its direction is opposite to the direction of the equilibrium potential.
    Etching current 5-1 OmA.
    The measurement is carried out with continuous current etching, the total duration of the measurement is 180 minutes.
    The measurement result is shown in FIG. 2 diagram of the active conductivity - the depth of etching. The overall thickness of the ten layers can be clearly read off the resulting diagram. The position of the boundary transitions manifests itself in the form of minima or maxima of the active signal is conductive;: depending on whether the energy of the forbidden zone on the boundary surface increases or decreases.
    Energy value for CaAs is 1.4 eV. for Cao.6Alo.4As 1.8 eV.
    Thus, the duration of the measurement due to the continuous etching is significantly reduced compared with the known measurement methods and the result achieved is accurate.
    Invention Formula
    1. A method for determining the thickness of layers in semiconductor layered structures, namely, that a sample with a laminated structure fixed on it is brought into contact with an electrolyte, anodic etching is carried out on the side of the layered structure, during which the value of the etching current is integrated, which is judged on the depth of etching. at the same time, the sample is excited with a periodic electric signal and the response to this effect, characterized in that, in order to increase accuracy and productivity, the actual component of the full conductivity of the sample is used as response to the impact, the extreme values of this component and the corresponding etching depths are fixed and according to the latter, the boundaries of the studied layers of the layered structure are determined. 2. A method according to claim 1, characterized in that the sample is etched continuously. 3. Method according to paragraphs. 1 and 2, I differ in that the sample surface is uniformly weighted. A. The method according to PP. 1-3, that is, by the fact that the sample is excited by a sinusoidal signal with a frequency determined from 500 kHz intervals. 5. Method according to paragraphs. 1-4, that is, in that the etching is carried out with a current strength i in the Interval 1 1 100 uA. 6. Method according to paragraphs. 1-5. characterized in that the excitation of the sample is carried out using a platinum electrode, which is immersed in the electrolyte and placed on the surface of the sample undergoing etching, and at least two electrodes that are pressed against the surface of the sample not subjected to etching 7. Method according to claim 6, This is due to the fact that before starting the measurement, the tips of the electrodes are fused into the surface of the sample using an electric discharge. 8. A device for determining the thickness of layers in semiconductor layered structures, containing a electrolyte-filled electrolyzer, a graphite electrode placed in an electrolyzer, a saturated calomel electrode, and a metal electrode intended to be placed at the sample surface with a semiconductor layered structure, a group of electrodes containing at least two electrodes and intended for contact with the opposite side of the sample, a DC power supply, a potentiostat, the output of which connected to a graphite electrode, an adjustment input with a saturated calomel electrode, and a power input with an output of a 110 dc power supply, a current integrator connected to the electrode group, a generator connected to a metal electrode and a group of electrodes, and measure the sample response connected to the output of the generator, so that, in order to increase accuracy and productivity, the sample response meter is made in the form of a meter of the actual total conductivity component. 9. The device according to claim 8, which is based on the fact that the meter of the real component of total conductivity is made in the form of a series-connected blocking amplifier and a phase-sensitive detector. 10. Device on PP. 8 and 9, of which there are that O. is equipped with a signal processing unit, to the first input of which the output of the meter of the actual component of full conductivity is connected, and to the second input - the output of the current integrator, i 11. The device according to claim 10, that the signal processing unit is designed as a two-coordinate recorder.
    i
    0.1 0.5 1.0 r.5 2.0 jum fig 2
    权利要求:
    Claims (11)
    [1]
    Claim
    1. The method of determining the thickness of the layers in semiconductor layered structures, which consists in the fact that a sample with a layered structure attached to it is brought into contact with the electrolyte, anode etching is carried out from the side of the layered structure, during which the value of the etching current is integrated, by which it is judged about the etching depth, they simultaneously excite the sample with the help of a periodic electric signal and measure the reaction to this effect, characterized in that. in order to increase accuracy and productivity, the actual component of the total conductivity of the sample is used as a response to the effect, the extreme values of this component and the corresponding etching depths are recorded and the boundaries of the studied layers of the layered structure are determined from the latter.
    [2]
    2. The method according to p. 1, with the fact that the etching of the sample is carried out continuously.
    [3]
    3. The method according to PP. 1 and 2, with the fact that the surface of the sample is etched evenly.
    [4]
    4. The method according to PP. 1-3, due to the fact that the sample is excited by a sinusoidal signal with a frequency determined from the intervals of 500 Hz ^ <10 kHz.
    [5]
    5. The method according to PP. 1-4, with the fact that the etching is carried out by a current strength i in the range of 1 μA <1 <100 μA.
    [6]
    6. The method according to PP. 1-5, distinguishing with that. that the sample is excited by means of a platinum electrode, which is immersed in the electrolyte and placed on the surface of the sample subjected to etching, and at least two electrodes that are pressed against the surface of the sample not subjected to etching.
    [7]
    7. The method according to claim 6, with the fact that before starting the measurement, the tips of the electrodes are melted into the surface of the sample using an electric discharge.
    [8]
    8. A device for determining the thickness of layers in semiconductor layered structures, containing an electrolyte filled electrolyzer, a graphite electrode placed in the electrolyzer, a saturated calomel electrode and a metal electrode designed to be placed at the surface of a sample with a semiconductor layered structure, a group of electrodes, containing at least two electrodes and intended for contacting with the opposite side of the sample, a DC power supply, a potentiostat, the output of which It is connected with a graphite electrode, the control input is with a saturated calomel electrode, and the power input is with the output of a DC power source, a current integrator connected to the group of electrodes, a generator connected to. a metal electrode and a group of electro -, / dov and a sample reaction meter connected to the output of the generator, characterized in that, in order to improve accuracy and performance, the sample reaction meter is made in the form of a meter of the real component of the full conductivity.
    [9]
    9. The device according to l. 8, the fact that the meter of the actual component of the full conductivity is made in the form of series-connected blocking amplifier and phase-sensitive detector.
    [10]
    10. The device according to paragraphs. 8 and 9, which entails the fact that it is equipped with a signal processing unit, to the first input of which the output of the meter of the real component of full conductivity is connected, and the output of the current integrator is connected to the second input. ''
    [11]
    11. The device according to claim 10, characterized in that the signal processing unit is made in the form of a two-coordinate recorder.
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    DD272695A1|1989-10-18|
    HU199020B|1989-12-28|
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    法律状态:
    优先权:
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